V3S - VHDL, Verilog, SystemVerilog for Visual Studio v2.1.0
What is V3S? VВіS is an extension for Microsoft's most excellent Visual Studio. It enables programmers to use Visual Studio as code editor for VHDL (and Verilog/SystemVerilog) projects. Following the rich feature set of the C# programming language, V3S offers many useful functions for efficiently coding in VHDL (or Verilog/SystemVerilog).
Improvements Reveal missing symbols in many cases (Press Ctrl+Space again to get more suggestions) Customize Commit Behavior: Insert/Replace (Enter/Tab Key) Auto Popup Auto Parenthesis/Brackets Auto Semicolon Auto Peposition Code Parameters Tooltip Auto Escape identifiers such as �For’ Suggest scoped enums Hide inaccessible static members